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Call for Papers:Vol.11 Issue.3

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Title: :  Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication
PaperId: :  9734
Published in:   International Journal Of Advance Research And Innovative Ideas In Education
Publisher:   IJARIIE
e-ISSN:   2395-4396
Volume/Issue:    Volume 5 Issue 2 2019
DUI:    16.0415/IJARIIE-9734
Licence: :   IJARIIE is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Author NameAuthor Institute
Shekar.RPrince Shri Venkateshwara Padmavathy Engineering College
Vigneshwaran.DPrince Shri Venkateshwara Padmavathy Engineering College

Abstract

Electronics and Communication Engineering
Vedic real multiplier, Urdhva Triyakbhyam sutra, complex multiplier, FPGA, area efficient architecture, array multiplier
In this paper, an area reduced multiplier design is conferred. This structure is based on ancient algorithm of Vedas, proposed within the Vedic mathematics scripture of Sri Bharati Krshna Tirthai Maharaja. Complex number multiplication is a very important numerical operation to be performed with fast and less power utilization in frameworks like Digital Signal Processing. Hence in this paper, a design is proposed for a vedic real multiplier based on urdhva tiryakbhyam sutra of Indian Vedic mathematics. The partial product and also sums are produced in few stages that decreases the carry propagation from LSB to MSB. In the proposed design we have reduced the amount of logic gates (area), hence reducing the power consumed. Finally, the effect of the Vedic multiplication is contrasted with array multiplication.

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IJARIIE Shekar.R, and Vigneshwaran.D. "Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication" International Journal Of Advance Research And Innovative Ideas In Education Volume 5 Issue 2 2019 Page 882-885
MLA Shekar.R, and Vigneshwaran.D. "Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication." International Journal Of Advance Research And Innovative Ideas In Education 5.2(2019) : 882-885.
APA Shekar.R, & Vigneshwaran.D. (2019). Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication. International Journal Of Advance Research And Innovative Ideas In Education, 5(2), 882-885.
Chicago Shekar.R, and Vigneshwaran.D. "Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication." International Journal Of Advance Research And Innovative Ideas In Education 5, no. 2 (2019) : 882-885.
Oxford Shekar.R, and Vigneshwaran.D. 'Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication', International Journal Of Advance Research And Innovative Ideas In Education, vol. 5, no. 2, 2019, p. 882-885. Available from IJARIIE, http://ijariie.com/AdminUploadPdf/Design_of_Area_Efficient_Complex_Number_Multiplier_Using_Vedic_Multiplication_ijariie9734.pdf (Accessed : ).
Harvard Shekar.R, and Vigneshwaran.D. (2019) 'Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication', International Journal Of Advance Research And Innovative Ideas In Education, 5(2), pp. 882-885IJARIIE [Online]. Available at: http://ijariie.com/AdminUploadPdf/Design_of_Area_Efficient_Complex_Number_Multiplier_Using_Vedic_Multiplication_ijariie9734.pdf (Accessed : )
IEEE Shekar.R, and Vigneshwaran.D, "Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication," International Journal Of Advance Research And Innovative Ideas In Education, vol. 5, no. 2, pp. 882-885, Mar-App 2019. [Online]. Available: http://ijariie.com/AdminUploadPdf/Design_of_Area_Efficient_Complex_Number_Multiplier_Using_Vedic_Multiplication_ijariie9734.pdf [Accessed : ].
Turabian Shekar.R, and Vigneshwaran.D. "Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication." International Journal Of Advance Research And Innovative Ideas In Education [Online]. volume 5 number 2 ().
Vancouver Shekar.R, and Vigneshwaran.D. Design of Area Efficient Complex Number Multiplier Using Vedic Multiplication. International Journal Of Advance Research And Innovative Ideas In Education [Internet]. 2019 [Cited : ]; 5(2) : 882-885. Available from: http://ijariie.com/AdminUploadPdf/Design_of_Area_Efficient_Complex_Number_Multiplier_Using_Vedic_Multiplication_ijariie9734.pdf
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