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Title: :  Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique
PaperId: :  12421
Published in:   International Journal Of Advance Research And Innovative Ideas In Education
Publisher:   IJARIIE
e-ISSN:   2395-4396
Volume/Issue:    Volume 6 Issue 4 2020
DUI:    16.0415/IJARIIE-12421
Licence: :   IJARIIE is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Author NameAuthor Institute
b.revathigandhiji institute of science and technology
k swaroopgandhiji institute of science and technology

Abstract

electonics and communication engineering
full adder
With the advancements in the technology and increase in the usage of laptops, cellular phones, ipads, Internet of Things (IoT) devices, and other portable communication systems, there are many applications requiring high speed, small area, and low power consumption. So there is a need of circuits with low energy consumption for the design of system components and application specific processors. The aim of this work is to design 1-bit full adder circuit using full-swing GDI to reduce power consumption, in addition to achieve full-swing output. This paper presents a design which provides full swing output for logic 1 and logic 0 for 1-bit full adder cell and reduces power consumption. In this design full adder consists of two XOR gate cells and one cell of 2x1 multiplexer (MUX). The performance of the proposed design compared with the different logic style for full adders.

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IJARIIE b.revathi, and k swaroop. "Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique" International Journal Of Advance Research And Innovative Ideas In Education Volume 6 Issue 4 2020 Page 1044-1052
MLA b.revathi, and k swaroop. "Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique." International Journal Of Advance Research And Innovative Ideas In Education 6.4(2020) : 1044-1052.
APA b.revathi, & k swaroop. (2020). Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique. International Journal Of Advance Research And Innovative Ideas In Education, 6(4), 1044-1052.
Chicago b.revathi, and k swaroop. "Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique." International Journal Of Advance Research And Innovative Ideas In Education 6, no. 4 (2020) : 1044-1052.
Oxford b.revathi, and k swaroop. 'Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique', International Journal Of Advance Research And Innovative Ideas In Education, vol. 6, no. 4, 2020, p. 1044-1052. Available from IJARIIE, http://ijariie.com/AdminUploadPdf/Design_and_Analysis_of_Low_Power_High_Speed_Full_Adder_Cell_using_Modified_GDI_Technique_ijariie12421.pdf (Accessed : ).
Harvard b.revathi, and k swaroop. (2020) 'Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique', International Journal Of Advance Research And Innovative Ideas In Education, 6(4), pp. 1044-1052IJARIIE [Online]. Available at: http://ijariie.com/AdminUploadPdf/Design_and_Analysis_of_Low_Power_High_Speed_Full_Adder_Cell_using_Modified_GDI_Technique_ijariie12421.pdf (Accessed : )
IEEE b.revathi, and k swaroop, "Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique," International Journal Of Advance Research And Innovative Ideas In Education, vol. 6, no. 4, pp. 1044-1052, Jul-Aug 2020. [Online]. Available: http://ijariie.com/AdminUploadPdf/Design_and_Analysis_of_Low_Power_High_Speed_Full_Adder_Cell_using_Modified_GDI_Technique_ijariie12421.pdf [Accessed : ].
Turabian b.revathi, and k swaroop. "Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique." International Journal Of Advance Research And Innovative Ideas In Education [Online]. volume 6 number 4 ().
Vancouver b.revathi, and k swaroop. Design and Analysis of Low Power High Speed Full Adder Cell using Modified GDI Technique. International Journal Of Advance Research And Innovative Ideas In Education [Internet]. 2020 [Cited : ]; 6(4) : 1044-1052. Available from: http://ijariie.com/AdminUploadPdf/Design_and_Analysis_of_Low_Power_High_Speed_Full_Adder_Cell_using_Modified_GDI_Technique_ijariie12421.pdf
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