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Title: :  FPGA based CRC using LUT
PaperId: :  15260
Published in:   International Journal Of Advance Research And Innovative Ideas In Education
Publisher:   IJARIIE
e-ISSN:   2395-4396
Volume/Issue:    Volume 7 Issue 5 2021
DUI:    16.0415/IJARIIE-15260
Licence: :   IJARIIE is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Author NameAuthor Institute
Aseela KMET School of Engineering,Mala
Navya MVMET School of Engineering, Mala
Lakshmi Raj V,MET School of Engineering,Mala

Abstract

Electronics and Communication Engineering
Cyclic Redundancy Check, Field Programmable Array, Linear Shift Register.
Error detection is an inevitable stage in data transmission. The current scenario in networking environment is high speed data transmission. It is necessary to increase speed of CRC generation to synchronize with the challenging speed of transmitting data. The main objective of this paper is to design a CRC-256 code generator for large input data blocks to increase the effectiveness of CRC codes in error detection. FPGA implementation of CRC code generator could be done in two versions. The first version of the generator designed using linear feedback shift registers is studied. Identifying the serial architecture, a recursive formula the parallel design was derived. As the second version, an accelerated CRC-256 generator designed using an acceleration technique for CRC generation. The implementation of both the CRC-256 generators was carried out in Verilog hardware description language. Simulation and functional verification Xilinx Design Suite 14.2 and Vivado is utilised. A look table-based generator is designed to compare efficiency.

Citations

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IJARIIE Aseela K, Navya MV, and Lakshmi Raj V,. "FPGA based CRC using LUT" International Journal Of Advance Research And Innovative Ideas In Education Volume 7 Issue 5 2021 Page 4-8
MLA Aseela K, Navya MV, and Lakshmi Raj V,. "FPGA based CRC using LUT." International Journal Of Advance Research And Innovative Ideas In Education 7.5(2021) : 4-8.
APA Aseela K, Navya MV, & Lakshmi Raj V,. (2021). FPGA based CRC using LUT. International Journal Of Advance Research And Innovative Ideas In Education, 7(5), 4-8.
Chicago Aseela K, Navya MV, and Lakshmi Raj V,. "FPGA based CRC using LUT." International Journal Of Advance Research And Innovative Ideas In Education 7, no. 5 (2021) : 4-8.
Oxford Aseela K, Navya MV, and Lakshmi Raj V,. 'FPGA based CRC using LUT', International Journal Of Advance Research And Innovative Ideas In Education, vol. 7, no. 5, 2021, p. 4-8. Available from IJARIIE, https://ijariie.com/AdminUploadPdf/FPGA_based_CRC_using_LUT_ijariie15260.pdf (Accessed : 03 September 2021).
Harvard Aseela K, Navya MV, and Lakshmi Raj V,. (2021) 'FPGA based CRC using LUT', International Journal Of Advance Research And Innovative Ideas In Education, 7(5), pp. 4-8IJARIIE [Online]. Available at: https://ijariie.com/AdminUploadPdf/FPGA_based_CRC_using_LUT_ijariie15260.pdf (Accessed : 03 September 2021)
IEEE Aseela K, Navya MV, and Lakshmi Raj V,, "FPGA based CRC using LUT," International Journal Of Advance Research And Innovative Ideas In Education, vol. 7, no. 5, pp. 4-8, Sep-Oct 2021. [Online]. Available: https://ijariie.com/AdminUploadPdf/FPGA_based_CRC_using_LUT_ijariie15260.pdf [Accessed : 03 September 2021].
Turabian Aseela K, Navya MV, and Lakshmi Raj V,. "FPGA based CRC using LUT." International Journal Of Advance Research And Innovative Ideas In Education [Online]. volume 7 number 5 (03 September 2021).
Vancouver Aseela K, Navya MV, and Lakshmi Raj V,. FPGA based CRC using LUT. International Journal Of Advance Research And Innovative Ideas In Education [Internet]. 2021 [Cited : 03 September 2021]; 7(5) : 4-8. Available from: https://ijariie.com/AdminUploadPdf/FPGA_based_CRC_using_LUT_ijariie15260.pdf
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