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Title: :  A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK
PaperId: :  7139
Published in:   International Journal Of Advance Research And Innovative Ideas In Education
Publisher:   IJARIIE
e-ISSN:   2395-4396
Volume/Issue:    Volume 3 Issue 6 2017
DUI:    16.0415/IJARIIE-7139
Licence: :   IJARIIE is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Author NameAuthor Institute
Arohi ParekhVGEC-Chandkheda, Gujarat, India
Chintan DaveVGEC-Chandkheda, Gujarat, India
Abhimanyu DhimanSAC-ISRO, Ahmedabad, Gujarat, India

Abstract

Electronics and Communication Engineering
Rabbit Processor, SOC, AXI interface, FPGA, Avalon MM interface
In MSS (mobile satellite services) services there are different products that we are using like SGU (satellite gateway unit), VGU (voice gateway unit), TGU (traffic gateway unit) so on. These different products are based on rabbit processor technology. For advanced hub (MSS), this product needs to be optimized for a high speed on FPGA devices. In SOC FPGA, input is ethernet data (TCP/IP) and output can be serial data, HDLC data or some data conversion. In SOC FPGA, LAN/IP stack, serial data is handled by the Arm processor and protocol conversion in HDLC and compute intensive tasks can be done in parallel, pipelined fashion in FPGA to transfer high speed ethernet traffic in a SOC/FPGA. To route ethernet traffic from Arm processor to FPGA and vice versa AXI interface is used that gives high speed. We have a AXI master on HPS side, so to connect FPGA, QSYS will automatically connect adapters of AXI slave and MM master that consumes most of the logic elements and reduces the speed of transfer. So, I will make AXI slave on FPGA side that will solve this both the problems.

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IJARIIE Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman. "A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK" International Journal Of Advance Research And Innovative Ideas In Education Volume 3 Issue 6 2017 Page 1400-1406
MLA Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman. "A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK." International Journal Of Advance Research And Innovative Ideas In Education 3.6(2017) : 1400-1406.
APA Arohi Parekh, Chintan Dave, & Abhimanyu Dhiman. (2017). A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK. International Journal Of Advance Research And Innovative Ideas In Education, 3(6), 1400-1406.
Chicago Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman. "A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK." International Journal Of Advance Research And Innovative Ideas In Education 3, no. 6 (2017) : 1400-1406.
Oxford Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman. 'A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK', International Journal Of Advance Research And Innovative Ideas In Education, vol. 3, no. 6, 2017, p. 1400-1406. Available from IJARIIE, https://ijariie.com/AdminUploadPdf/A_REVIEW___AXI_BUS_INTERFACING_BETWEEN_FPGA_AND_HPS_IN_MSS_HUB_NETWORK_ijariie7139.pdf (Accessed : 13 December 2017).
Harvard Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman. (2017) 'A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK', International Journal Of Advance Research And Innovative Ideas In Education, 3(6), pp. 1400-1406IJARIIE [Online]. Available at: https://ijariie.com/AdminUploadPdf/A_REVIEW___AXI_BUS_INTERFACING_BETWEEN_FPGA_AND_HPS_IN_MSS_HUB_NETWORK_ijariie7139.pdf (Accessed : 13 December 2017)
IEEE Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman, "A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK," International Journal Of Advance Research And Innovative Ideas In Education, vol. 3, no. 6, pp. 1400-1406, Nov-Dec 2017. [Online]. Available: https://ijariie.com/AdminUploadPdf/A_REVIEW___AXI_BUS_INTERFACING_BETWEEN_FPGA_AND_HPS_IN_MSS_HUB_NETWORK_ijariie7139.pdf [Accessed : 13 December 2017].
Turabian Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman. "A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK." International Journal Of Advance Research And Innovative Ideas In Education [Online]. volume 3 number 6 (13 December 2017).
Vancouver Arohi Parekh, Chintan Dave, and Abhimanyu Dhiman. A REVIEW : AXI BUS INTERFACING BETWEEN FPGA AND HPS IN MSS HUB NETWORK. International Journal Of Advance Research And Innovative Ideas In Education [Internet]. 2017 [Cited : 13 December 2017]; 3(6) : 1400-1406. Available from: https://ijariie.com/AdminUploadPdf/A_REVIEW___AXI_BUS_INTERFACING_BETWEEN_FPGA_AND_HPS_IN_MSS_HUB_NETWORK_ijariie7139.pdf
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