Call for Papers:Vol.11 Issue.3

Submission
Last date		 28-Jun-2025
Acceptance Status In One Day
Paper Publish In Two Days
Submit ManuScript

News & Updates

Submit Article

Dear Authors, Article publish in our journal for Volume-11,Issue-3. For article submission on below link: Submit Manuscript


Join As Board

Dear Reviewer, You can join our Reviewer team without given any charges in our journal. Submit Details on below link: Join As Board


Paper Publication Charges

IJARIIE APP
Download Android App

For Authors

Archives

IJARIIE Board

Downloads

Android App

Download IJARIIE APP

Authors

Title: :  FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM
PaperId: :  9111
Published in:   International Journal Of Advance Research And Innovative Ideas In Education
Publisher:   IJARIIE
e-ISSN:   2395-4396
Volume/Issue:    Volume 4 Issue 5 2018
DUI:    16.0415/IJARIIE-9111
Licence: :   IJARIIE is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Author NameAuthor Institute
KAMINI JHAPimpri Chinchwad College of Engineering(PCCOE)
AJIT B. PATILPimpri Chinchwad College of Engineering(PCCOE)
DEEPTI S. KHURGEPimpri Chinchwad College of Engineering(PCCOE)

Abstract

ELECTRONICS & TELECOMMUNICATION
Questa Sim ,USB 2.0 , SV, UVM .
This paper presents the verification of Universal serial Bus 2.0 using System Verilog- Universal Verification Methodology. At present as technology is increasing rapidly communication have become an important part of digital world. Some of the main features of USB are speed negotiation , data transfer, device detection. Test cases have been written to verify the functionality of the design .All the simulation work have been carried in Mentor Graphics EDA tool Questa Sim.

Citations

Copy and paste a formatted citation or use one of the links to import into a bibliography manager and reference.

IJARIIE KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE. "FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM" International Journal Of Advance Research And Innovative Ideas In Education Volume 4 Issue 5 2018 Page 426-432
MLA KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE. "FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM." International Journal Of Advance Research And Innovative Ideas In Education 4.5(2018) : 426-432.
APA KAMINI JHA, AJIT B. PATIL, & DEEPTI S. KHURGE. (2018). FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM. International Journal Of Advance Research And Innovative Ideas In Education, 4(5), 426-432.
Chicago KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE. "FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM." International Journal Of Advance Research And Innovative Ideas In Education 4, no. 5 (2018) : 426-432.
Oxford KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE. 'FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM', International Journal Of Advance Research And Innovative Ideas In Education, vol. 4, no. 5, 2018, p. 426-432. Available from IJARIIE, https://ijariie.com/AdminUploadPdf/FUNCTIONAL_VERIFICATION_OF_USB_2_0_VIP_USING_SV__UVM_ijariie9111.pdf (Accessed : 04 October 2024).
Harvard KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE. (2018) 'FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM', International Journal Of Advance Research And Innovative Ideas In Education, 4(5), pp. 426-432IJARIIE [Online]. Available at: https://ijariie.com/AdminUploadPdf/FUNCTIONAL_VERIFICATION_OF_USB_2_0_VIP_USING_SV__UVM_ijariie9111.pdf (Accessed : 04 October 2024)
IEEE KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE, "FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM," International Journal Of Advance Research And Innovative Ideas In Education, vol. 4, no. 5, pp. 426-432, Sep-Oct 2018. [Online]. Available: https://ijariie.com/AdminUploadPdf/FUNCTIONAL_VERIFICATION_OF_USB_2_0_VIP_USING_SV__UVM_ijariie9111.pdf [Accessed : 04 October 2024].
Turabian KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE. "FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM." International Journal Of Advance Research And Innovative Ideas In Education [Online]. volume 4 number 5 (04 October 2024).
Vancouver KAMINI JHA, AJIT B. PATIL, and DEEPTI S. KHURGE. FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM. International Journal Of Advance Research And Innovative Ideas In Education [Internet]. 2018 [Cited : 04 October 2024]; 4(5) : 426-432. Available from: https://ijariie.com/AdminUploadPdf/FUNCTIONAL_VERIFICATION_OF_USB_2_0_VIP_USING_SV__UVM_ijariie9111.pdf
BibTex EndNote RefMan RefWorks

Number Of Downloads


Last download on 10/4/2024 8:34:44 AM

Save in Google Drive

Similar-Paper

TitleArea of ResearchAuther NameAction
Design Analysis and Implementation of Two Stage Operational AmplifierElectronics and Communication EngineeringRAJ KESARWANI Download
1X3 ROUTER RTL & UVM TESTBENCHElectronic and Telecommunication (VLSI BASED)MOHARIL ABOLI Download
ASIC Implementation Of PULP RISC-V CoreElectronics and Communication EngineeringAnirudh Rao M Download
FPGA IMPLEMENTATION OF KARATSUBA VEDIC MULTIPLIERSElectronics and Communication EngineeringShankar R Download
Metastability Mitigation & Error Masking of Flip-FlopElectronics & CommunicationAPARNA Download
DESIGN OF CURRENT STARVED VCO USING POWER GATED INVERTER FOR PLLElectronics & Communication EngineeringMEENAKSHI TIWARI Download
LVDS Design for High speed ApplicationElectronicsAtharvan Boxey Download
virtual paintig through gesture detection and color segmentation technique using DE2 FPGA boardElctronics and telecommunication engineeringMs. Pooja Bcahhav Download
Design and implementation of enhanced sleepy stack with LECTOR technique for low power consumption in CMOS VLSI circuitElectronics and communicationRahul Itnal Download
THRESHOLD LOGIC’S IMPORTANCE IN BUILDING EFFICIENT AND COMPACT DIGITAL CIRCUITS AND ITS SCOPE IN MODERN TECHNOLOGYELECTRONICS AND COMMUNICATION ENGINEERINGE.VENU BHAGIRATH Download
A Review on Dysarthria speech disorderelectonics and telecommunicationYogita S. Mahadik Download
FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVMELECTRONICS & TELECOMMUNICATIONKAMINI JHA Download
Implementation of IEC 61131-3 Standard Compatible instruction List Processor on FPGA PlatformVLSI designSagar Shedge Download
SPEED AND AREA EFFICIENT VLSI ARCHITECTURES FOR MPSK MODEMSELECTRONICS AND COMMUNICATION ENGINEERINGESTHER RANI C Download
180nm CMOS process based L-band CML to CMOS converterElectronics and CommunicationChirag Senjalliya Download
12