DESIGN AND IMPLEMENTING COMMUNICATION BRIDGE BETWEEN I2C AND APB

electonics and communication engineering

I2C master/slave controller is an interface that interconnects an advanced peripheral bus (APB) with Inter Integrated circuit (I2C) bus. The APB - I2C Bridge interfaces to the APB bus on the system side and the I2C bus. The APB interface is used to easily integrate the Bridge Controller for any SOC implementation. The controller performs the following functions. Parallel-to-serial conversion on data written to an internal 8bit wide,1024 deep FIFO. Serial-to-parallel conversion on received data, buffering it in a similar 8-bit wide,1024 deep FIFO. Device states are read by the APB using status registers that reflect the completion of I2C transfers. The APB bus is part of the Advanced Microcontroller Bus Architecture (AMBA) hierarchy of buses and is optimized for minimal power consumption and reduced interface complexity. to 100 Kbit/s in the Standardmode, up to 400 Kbit/s in the Fast-mode, or up to 3.4 Mbit/s in the High-speed mode.I2C interface supports a Clock generation circuitry to derive I2C clock from APB clock. I2C interface supports various operational frequencies from 100 KHZ to 400 KHZ. It supports a simple bi-directional 2-wire bus for efficient inter-IC control.

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