| Title | Area of Research | Auther Name | Action |
| ASIC Implementation Of PULP RISC-V Core | Electronics and Communication Engineering | Anirudh Rao M |
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| FPGA IMPLEMENTATION OF KARATSUBA VEDIC MULTIPLIERS | Electronics and Communication Engineering | Shankar R |
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| Metastability Mitigation & Error Masking of Flip-Flop | Electronics & Communication | APARNA |
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| DESIGN OF CURRENT STARVED VCO USING POWER GATED INVERTER FOR PLL | Electronics & Communication Engineering | MEENAKSHI TIWARI |
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| LVDS Design for High speed Application | Electronics | Atharvan Boxey |
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| virtual paintig through gesture detection and color segmentation technique using DE2 FPGA board | Elctronics and telecommunication engineering | Ms. Pooja Bcahhav |
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| Design and implementation of enhanced sleepy stack with LECTOR technique for low power consumption in CMOS VLSI circuit | Electronics and communication | Rahul Itnal |
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| THRESHOLD LOGIC’S IMPORTANCE IN BUILDING EFFICIENT AND COMPACT DIGITAL CIRCUITS AND ITS SCOPE IN MODERN TECHNOLOGY | ELECTRONICS AND COMMUNICATION ENGINEERING | E.VENU BHAGIRATH |
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| A Review on Dysarthria speech disorder | electonics and telecommunication | Yogita S. Mahadik |
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| FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVM | ELECTRONICS & TELECOMMUNICATION | KAMINI JHA |
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| Implementation of IEC 61131-3 Standard Compatible instruction List Processor on FPGA Platform | VLSI design | Sagar Shedge |
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| SPEED AND AREA EFFICIENT VLSI ARCHITECTURES FOR MPSK MODEMS | ELECTRONICS AND COMMUNICATION ENGINEERING | ESTHER RANI C |
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| 180nm CMOS process based L-band CML to CMOS converter | Electronics and Communication | Chirag Senjalliya |
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| DESIGN OF A MODULAR FEEDFORWARD PHASE/FREQUENCY DETECTOR FOR HIGH SPEED PLL | VLSI Design & Embedded System | Raju Patel |
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| IMPROVING TEST COVERAGE OF SCL USING TEST POINT INSERTION | VLSI DESIGN | SRUTHI M S |
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