Logo
  • Home
  • About Us
    • Aim and Scope
    • Research Area
    • Impact Factor
    • Indexing
  • For Authors
    • Authors Guidelines
    • How to publish paper?
    • Download Paper format
    • Submit Manuscript
    • Processing Charges
    • Download Copyrights Form
    • Submit Payment-Copyrights
  • Archives
    • Current Issues
    • Past Issues
    • Conference Issues
    • Special Issues
    • Advance Search
  • IJARIIE Board
    • Join as IJARIIE Board
    • Advisory Board
    • Editorial Board
    • Sr. Reviewer Board
    • Jr. Reviewer Board
  • Proposal
    • Conferece Proposal
    • Special Proposal
    • Faqs
  • Contact Us
  • Payment Detail

Call for Papers:Vol.11 Issue.3

Submission
Last date
28-Jun-2025
Acceptance Status In One Day
Paper Publish In Two Days
Submit ManuScript

News & Updates

Submit Article

Dear Authors, Article publish in our journal for Volume-11,Issue-3. For article submission on below link: Submit Manuscript


Join As Board

Dear Reviewer, You can join our Reviewer team without given any charges in our journal. Submit Details on below link: Join As Board


Paper Publication Charges

IJARIIE APP
Download Android App

For Authors

  • How to Publish Paper
  • Submit Manuscript
  • Processing Charges
  • Submit Payment

Archives

  • Current Issue
  • Past Issue

IJARIIE Board

  • Member Of Board
  • Join As Board

Downloads

  • Authors Guidelines
  • Manuscript Template
  • Copyrights Form

Android App

Download IJARIIE APP
  • Authors
  • Abstract
  • Citations
  • Downloads
  • Similar-Paper

Authors

Title: :  Metastability Mitigation & Error Masking of Flip-Flop
PaperId: :  12778
Published in:   International Journal Of Advance Research And Innovative Ideas In Education
Publisher:   IJARIIE
e-ISSN:   2395-4396
Volume/Issue:    Volume 6 Issue 5 2020
DUI:    16.0415/IJARIIE-12778
Licence: :   IJARIIE is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Author NameAuthor Institute
APARNABhabha Engineering Research Institute, Bhabha University Bhopal
Himanshu ShekharBhabha Engineering Research Institute, Bhabha University Bhopal

Abstract

Electronics & Communication
Metastability, SAFF, CMOS, flip-flop, synchronizing, PDFF, latch
Metastability events are commonplace in digital circuits, and synchronizers are vital to shield us from their lethal outcomes. Originally synchronizers had been vital whilst playing an asynchronous enter (that is, one synchronized with the clock enter so that might trade exactly while the pattern). Everything changes can easily be metastable. Switch its data enter at the equal time that the sampling edge of the clock and also you get Metastability. The indicators relative period of each cycle varies a little, and subsequently main to the metastability, close enough to every other switches. This aggregate of metastability with regular show gadgets, arise often. Recent semiconducting metallic oxide progress (CMOS) moreover it ends in unprecedented ranges of integration in virtual logic systems. Due to the propagation delay of the path and timing clock keep time configuration errors failure occurs in virtual circuits. The proposed flip flops take advantage of the idea of either delayed information or pulse primarily based method to stumble on timing errors. The timing violations are masked by means of passing direct facts instead of grasp latch output to slave latch. Simulation outcomes display that the proposed turn-flops lessen the mistake covering latency as much as 23% respectively in normal process corners and increase the powerful timing error monitoring window compared to country of the artwork metastable immune turn-flops [14]. The proposed flip-flops can be utilized in dynamic voltage and frequency

Citations

Copy and paste a formatted citation or use one of the links to import into a bibliography manager and reference.

IJARIIE APARNA, and Himanshu Shekhar. "Metastability Mitigation & Error Masking of Flip-Flop" International Journal Of Advance Research And Innovative Ideas In Education Volume 6 Issue 5 2020 Page 919-923
MLA APARNA, and Himanshu Shekhar. "Metastability Mitigation & Error Masking of Flip-Flop." International Journal Of Advance Research And Innovative Ideas In Education 6.5(2020) : 919-923.
APA APARNA, & Himanshu Shekhar. (2020). Metastability Mitigation & Error Masking of Flip-Flop. International Journal Of Advance Research And Innovative Ideas In Education, 6(5), 919-923.
Chicago APARNA, and Himanshu Shekhar. "Metastability Mitigation & Error Masking of Flip-Flop." International Journal Of Advance Research And Innovative Ideas In Education 6, no. 5 (2020) : 919-923.
Oxford APARNA, and Himanshu Shekhar. 'Metastability Mitigation & Error Masking of Flip-Flop', International Journal Of Advance Research And Innovative Ideas In Education, vol. 6, no. 5, 2020, p. 919-923. Available from IJARIIE, https://ijariie.com/AdminUploadPdf/Metastability_Mitigation___Error_Masking_of_Flip_Flop_ijariie12778.pdf (Accessed : ).
Harvard APARNA, and Himanshu Shekhar. (2020) 'Metastability Mitigation & Error Masking of Flip-Flop', International Journal Of Advance Research And Innovative Ideas In Education, 6(5), pp. 919-923IJARIIE [Online]. Available at: https://ijariie.com/AdminUploadPdf/Metastability_Mitigation___Error_Masking_of_Flip_Flop_ijariie12778.pdf (Accessed : )
IEEE APARNA, and Himanshu Shekhar, "Metastability Mitigation & Error Masking of Flip-Flop," International Journal Of Advance Research And Innovative Ideas In Education, vol. 6, no. 5, pp. 919-923, Sep-Oct 2020. [Online]. Available: https://ijariie.com/AdminUploadPdf/Metastability_Mitigation___Error_Masking_of_Flip_Flop_ijariie12778.pdf [Accessed : ].
Turabian APARNA, and Himanshu Shekhar. "Metastability Mitigation & Error Masking of Flip-Flop." International Journal Of Advance Research And Innovative Ideas In Education [Online]. volume 6 number 5 ().
Vancouver APARNA, and Himanshu Shekhar. Metastability Mitigation & Error Masking of Flip-Flop. International Journal Of Advance Research And Innovative Ideas In Education [Internet]. 2020 [Cited : ]; 6(5) : 919-923. Available from: https://ijariie.com/AdminUploadPdf/Metastability_Mitigation___Error_Masking_of_Flip_Flop_ijariie12778.pdf
BibTex EndNote RefMan RefWorks

Number Of Downloads



Save in Google Drive

Similar-Paper

TitleArea of ResearchAuther NameAction
Design Analysis and Implementation of Two Stage Operational AmplifierElectronics and Communication EngineeringRAJ KESARWANI Download
1X3 ROUTER RTL & UVM TESTBENCHElectronic and Telecommunication (VLSI BASED)MOHARIL ABOLI Download
ASIC Implementation Of PULP RISC-V CoreElectronics and Communication EngineeringAnirudh Rao M Download
FPGA IMPLEMENTATION OF KARATSUBA VEDIC MULTIPLIERSElectronics and Communication EngineeringShankar R Download
Metastability Mitigation & Error Masking of Flip-FlopElectronics & CommunicationAPARNA Download
DESIGN OF CURRENT STARVED VCO USING POWER GATED INVERTER FOR PLLElectronics & Communication EngineeringMEENAKSHI TIWARI Download
LVDS Design for High speed ApplicationElectronicsAtharvan Boxey Download
virtual paintig through gesture detection and color segmentation technique using DE2 FPGA boardElctronics and telecommunication engineeringMs. Pooja Bcahhav Download
Design and implementation of enhanced sleepy stack with LECTOR technique for low power consumption in CMOS VLSI circuitElectronics and communicationRahul Itnal Download
THRESHOLD LOGIC’S IMPORTANCE IN BUILDING EFFICIENT AND COMPACT DIGITAL CIRCUITS AND ITS SCOPE IN MODERN TECHNOLOGYELECTRONICS AND COMMUNICATION ENGINEERINGE.VENU BHAGIRATH Download
A Review on Dysarthria speech disorderelectonics and telecommunicationYogita S. Mahadik Download
FUNCTIONAL VERIFICATION OF USB 2.0 VIP USING SV- UVMELECTRONICS & TELECOMMUNICATIONKAMINI JHA Download
Implementation of IEC 61131-3 Standard Compatible instruction List Processor on FPGA PlatformVLSI designSagar Shedge Download
SPEED AND AREA EFFICIENT VLSI ARCHITECTURES FOR MPSK MODEMSELECTRONICS AND COMMUNICATION ENGINEERINGESTHER RANI C Download
180nm CMOS process based L-band CML to CMOS converterElectronics and CommunicationChirag Senjalliya Download
12
For Authors
  • Submit Paper
  • Processing Charges
  • Submit Payment
Archive
  • Current Issue
  • Past Issue
IJARIIE Board
  • Member Of Board
  • Join As Board
Privacy and Policy
Follow us

Contact Info
  • +91-8401209201 (India)
  • +86-15636082010 (China)
  • ijariiejournal@gmail.com
  • M-20/234 Ami Appt,
    Nr.Naranpura Tele-Exch,
    Naranpura,
    Ahemdabad-380063
    Gujarat,India.
Copyright © 2025. IJARIIE. All Rights Reserved.